Technical Field
This invention relates to computing systems, and more particularly, to techniques for implementing reset functions in an Input/Output (I/O) subsystem.
Description of the Related Art
Computing systems include multiple multi-threaded processors and devices, where each processor may send data to or receive data from a particular device. For example, the devices may include ethernet network interface cards (NICs) that allow the processors to communicate with other computing systems, and other devices either internal or external to the computing system such as printers or storage devices, for example.
Hardware resources associated with a particular device may be shared between various threads being executed by one or more of the multi-threaded processors. During operation, a given thread may execute one or more software instructions that request access, either a read or write, to a particular hardware resource of a given device. The computing system may format and transmit the access request to the particular hardware resource via a packetized serial communication link.
To manage access requests from the various threads, a device may include dedicated hardware to perform control and data functions within the device. In some cases, the dedicated hardware may include an embedded processor, or other suitable general-purpose processor, configured to execute multiple software instructions. In some computing systems, a device with shared hardware resources may be integrated into a System-on-a-Chip (SoC) along with one or more multi-threaded processors, for improved performance.
During operation, it may be desirable to reset a device. The desire to reset a particular device may be the result of the device generating errors, or a request to reallocate hardware resources of the device to a different execution thread.